A simple linear example
We will illustrate linear flow with a simple equation. First we define symbol representing the completeness behavior linking oscillations. The grey lines indicate the oscillation closure paths. A grey rectangle on the output of the symbol indicates the completeness detection. The input with an internal inverting circle is the enable. The symbol encompasses any NCL combinational completeness behavior. The symbol with an equivalent circuit is shown below.
A simple equation
B = (A – W ) + (A – X) + (A – Y) + (A – Z)
Assume that a clock period has time for only one operation so the equation has to be partitioned into three clock ticks controlled by a state machine.
State 0: temp0 <= A – W; temp1 <= A – X; temp2 <= A – Y; temp3 <= A – Z;
State 1: temp4 <= temp0 + temp1; temp5 <= temp2 + temp3;
State 2: B <= temp4 + temp5;
The equation can similarly be partitioned into a structure of linked oscillations.
The structure looks like a combinational circuit but the oscillations partition it into the same behavior units that the clock and state machine did. It behaves with spontaneous pipeline flow rather than with sequence controlled flow. Each linking behavior implements a computation behavior, maintains the result until it is passed on and manages the flow control of forwarding the result and receiving the next input. The clock, the registers and the state machine have all disappeared and their individual behaviors have been integrated into a network of linked oscillations purely in terms of NCL.
Pipeline flow behavior
The input wavefronts are presented to the first stage of the oscillation structure. As soon as they are accepted by the second stage of the oscillation structure the first stage can accept the following null wavefront. The computation data wavefront flows on. The second stage accepts the null wavefront and the first stage can accept a next data wavefront. Typically, successive data wavefronts will flow four stages apart. When one data wavefront gets four stages into a pipeline structure a successor data wavefront can begin flowing.
Consider a clocked circuit with an eight state state machine. State 0 will accept input, sequence through the next 7 states and then back to state 0 to accept a next input. The corresponding pipeline in contrast will accept an input which will flow through four stages (four oscillations) at which point the pipeline can accept a next input. Data wavefronts will flow four oscillation stages apart and the pipeline will produce output four stages apart (every four oscillations)
Assuming the oscillation periods are roughly equivalent to clock periods, the state controlled clocked circuit will produce an output every eight clock ticks and the pipeline will produce an output every four oscillations delivering roughly twice the throughput .
A clocked system computation flows through the functional logic and a register each clock tic with the added delay of the clock margins. With a reasonably balanced NCL pipeline a computation wavefront will flow only through functional logic with no delay. A pipeline of linked oscillations could perform a computation much faster (shorter latency) than a state machine sequenced clocked computation.
So the NCL structure of linked oscillations can deliver faster latency and higher throughput. Or it can deliver comparable throughput and latency with slower, cheaper,lower power circuits.